39395br india - hyderabad
Job description and requirements
SrIi r&d engineer, hardware development –
Our silicon lifecycle management (slm) business is all about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stageWe offer the world’s first full hardware ip, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliabilityMeeting the unique challenges posed by various target applications, slm enables differentiated products to market quickly with reduced risk.
Job descriptions & requirements
Part of the rapidly expanding hardware-analytics and test (hat) business unit, a digital hardware designer works on development of various sensor, test and debug ips as part of hdg (hardware development group) product portfolioThe digital hw designer will conceptualize new ip products as well as understand existing products and enhance them for better performance, automation friendliness and ease of designWe are seeking an experienced, highly motivated, and high-caliber individual to build these differentiating digital sensor/controller productsThis individual should have strong technical experience in digital frontend design, backend implementation, timing, post-silicon characterization, pvt and dfx domainsAdditional responsibilities include:
Work on dfx/sensor development projects in hdg-india
Understand business priorities and break it down into technical tasks
Understand existing products at lower levels and identify enhancement opportunities / cost
Look ahead into future opportunities and help create a technical roadmap for the ip
Deployment of new sensors into test chips and post-silicon characterization
Architectural and forward-looking thought process
Sound knowledge of frontend digital design and backend implementation
Bs or ms degree in electrical engineering with 5+ years of relevant industry experience
Exposure to architecture, design or verification of dft, test & debug ips
Exposure to architecture, design or verification of pvt, ring-oscillator, mixed-signal based ips
Demonstrated experience with multiple cad flows: design, verification, backend, validation, etc.
Excellent teamwork, communication and interpersonal skills with both internal teams and external customers
Strong rtl design and coding experience in verilog, system verilog, vhdl etc.
Backend implementation exposure in sta, p&r and rtl2gds asic flows
Experience with micro architecture and design of small to medium sized digital ips
Knowledge of one or more amba protocols: apb, axi etc.
Experience in dft/dfx technologies, pvt-sensors and related concepts is a strong plus
At synopsys, we’re at the heart of the innovations that change the way we work and playSelf-driving carsArtificial intelligenceThe cloud5gThe internet of thingsThese breakthroughs are ushering in the era of smart everythingAnd we’re powering it all with the world’s most advanced technologies for chip design and software securityIf you share our passion for innovation, we want to meet you.
Inclusion and diversity are important to usSynopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
Posted 30+ days ago