Job type full-time
Full job description
About the role
Ceremorphic ai hardware combines knowledge across many domains, including ai, compilers, computer architecture, analog circuits, and memories.
A key component of our system is the high-speed interconnectThe serdes senior/staff designer would be in charge of a core part of the high-speed phy, including pcie, ethernet, and usb, in advanced finfet technology nodesA strong understanding of analog/mixed-signal circuit theories, and expert hands-on design skills, are keys to a successful candidate for this position.
Strong understanding of analog/mixed-signal design theories and practical concepts such as mismatch, ratio-metric, linearity, stability, noise, and low-power
Strong understanding of one of the following core components of a high-speed phy: cdr, pll, pi, ctle, tx driver, serializer/de-serializer
Experience in circuit tradeoff analysis and ability to comprehend system-level specs and their impacts on circuit design, knowledge of pam4 systems is a plus.
Understanding of the physical layout requirements and hands-on ability to perform critical layouts, experience in finfet a plus
Proven track record of successful tape out and silicon meeting performance and power specifications, and experience in chip debug/validation/characterization.
The ability to communicate technical issues and present technical reviews coherently and logically are essential.
Posted 17 days ago